1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, having an improved version of a step of forming a gettering layer which serves to prevent the deterioration of electrical characteristics of the device, which may be caused by metal impurity contamination.
2. Description of the Related Art
With regard to the manufacturing process of semiconductor devices, it is known that metals such as chromium, iron, copper, nickel and tungsten, which may be taken into a silicon substrate from materials of manufacturing apparatus, such as a diffusion furnace, chemicals for cleaning, and the like, induce a defect of crystal, which may cause a junction leak current or the like, thus deteriorating the characteristics of the semiconductor device.
The removal of these contamination metals, which is performed outside the active region of the semiconductor, is called "gettering". As one type of the gettering techniques, a so-called phosphorus gettering method is conventional employed. In this method, an active element such as MOSFET is formed on a silicon substrate, and thereafter the reverse surface of the silicon substrate is exposed, and a phosphorus diffusion is carried out at a high temperature (for example, 850.degree. C. or higher). Thus, a high-concentration phosphorus diffusion layer is formed on the reverse surface of the silicon substrate, and metal components within the silicon substrate is caught in the high-concentration phosphorus diffusion layer.
This method is effective since it can be carried out at the same time as a reflow step, where a high-concentration phosphorus is diffused at a high temperature in an interlayer film formed on an obverse surface of a silicon substrate, and the obverse surface of the interlayer film is smoothed.
In the meantime, as the downsizing of semiconductor devices proceeds, it becomes necessary to form source and drain diffusion layers very thin in order to suppress the short channel effect of the MOSFET. As to the 0.25 .mu.m-generation, for example, it is necessary to form a diffusion layer having a depth as shallow as about 0.08 .mu.m. In order to achieve this, it is important that a high temperature heat process is not carried out after the formation of the source and drain diffusion layers.
Since the conventional phosphorus gettering method requires a high-temperature heat process for the diffusion of phosphorus, it becomes impossible to follow the downsizing of semiconductor devices. As a solution to this problem, there has been proposed a method of forming a high-concentration gettering layer at a low temperature. In this method, the gettering is carried out by a step of depositing a silicon thin film to which an impurity was added, on the reverse surface of a silicon substrate.
A conventional method of forming a MOSFET, which employs a process of depositing a silicon thin film to which an impurity was added, on the reverse surface of a silicon substrate, will now be described.
As can be seen in FIG. 1, a silicon oxide film having a thickness of about 50 nm is formed on an upper surface of a silicon substrate 301, a silicon thin film 303 having a thickness of about 100 nm is formed on the silicon oxide film 302, and a silicon nitride film 304 having a thickness of about 150 nm is formed on the silicon thin film 303, in the order.
After that, a resist is applied on the silicon nitride film 304 by a photolithographic method, and then a portion of the resist, which corresponds to an element separation region, is removed, thus forming a resist pattern 305 for the formation of the element separation region.
In general, the silicon oxide film 302 is formed by a thermal oxidizing method or a reduced pressure CVD method, and the silicon thin film 303 and the silicon nitride film 304 are formed by a reduced pressure CVD method. Consequently, these layers are deposited similarly on the reverse surface of the silicon substrate 301.
Next, as can be seen in FIG. 2, after the silicon nitride film 304 is etched by the RIE method using the silicon thin film 303 as an etching stopper, the resist pattern for forming the element separation region is stripped.
Next, as can be seen in FIG. 3, a silicon oxide film 306 having a thickness of about 700 nm is formed selectively in the element separation region by the thermal oxidizing method. This is a general method of forming an element separation, and it is called a LOCOS method.
Next, the silicon nitride film 304, the silicon thin film 303 and the silicon oxide film 302 formed on the obverse surface of the silicon substrate 301, and the silicon oxide film 302, the silicon thin film 303 and the silicon nitride film 304 formed on the rear side of the silicon substrate 301 are removed, and then a gate oxide film 307 is formed as can be seen in FIG. 4.
Next, steps of an ordinary MOSFET manufacturing process, that is, the formation of a gate electrode 308 and then source and drain diffusion layers 309, are carried out, thus forming a MOSFET on the silicon substrate 301. On the reverse surface of the silicon substrate 301, a silicon oxide film 310 and a silicon thin film 311 are formed.
Subsequently, as can be seen in FIG. 5, an interlayer insulation film 312 consisting mainly of a silicon oxide film, is deposited on the silicon substrate to have a thickness of about 900 nm, and then thus formed film is smoothed by, for example, a CMP (chemical mechanical polishing) method. After that, as shown in FIG. 6, the silicon oxide film 310 and the silicon thin film 311 deposited on the reverse surface of the silicon substrate 301 are selectively removed, thus exposing the reverse surface of the silicon substrate 301.
Then, as shown in FIG. 7, a silicon thin film 313 to which an impurity was added, is deposited over the interlayer insulation film 312 on the silicon substrate 301 to have a thickness of about 900 nm by the reduced pressure CVD method.
Subsequently, as shown in FIG. 8, only the silicon thin film 313 deposited over the interlayer insulation film 312 on the obverse surface of the silicon substrate 301 is selectively removed, whereas the silicon thin film 313 deposited on the reverse surface of the silicon substrate 301 is left as it is. The silicon thin film 313 to which the impurity was added, give rise to a gettering layer. The impurity added is generally boron or phosphorus.
After that, as can be seen in FIG. 9, a contact hole 314 which is made through the inter layer insulation film 312 and the gate oxide film 307 to reach the source and drain diffusion layers 309 is formed. Subsequently, a metal member 315 which communicates through the contact hole 314 is formed, thus completing a semiconductor device.
As described above, the conventional method of manufacturing a semiconductor device requires a step of depositing an interlayer insulation film 312 which is made of a silicon oxide film as a main component, followed by smoothing, and selectively removing the silicon oxide film 310 and the silicon thin film 311 deposited on the reverse surface of the silicon substrate, thus exposing the reverse surface of the silicon substrate 301, a step of depositing a silicon thin film 313 to which an impurity was added, on both sides of the silicon substrate 301, and a step of selectively removing only the silicon thin film 313 which is formed on the obverse surface of the silicon substrate 301. These steps are not necessary for forming a MOSFET solely, and thus the conventional method contains an increased number of steps and therefore an increased amount of manufacturing cost.
Conventionally, manufacturing methods which do not require an exclusive step for gettering are proposed in Jap. Pat. Appln. KOKAI Publications No. 61-159741, No. 2-218136, No. 5-109736 and the like. According to these methods, in a step of forming an insulation film on the obverse surface of a silicon substrate of the process of forming an ordinary MOSFET, an insulation film formed also on the reverse surface of a silicon substrate is removed so as to expose the reverse surface of the silicon substrate, and a polycrystal semiconductor film is formed on both sides of the silicon substrate. Then, an impurity is diffused into the polycrystal semiconductor films at a high temperature, and then the polycrystal semiconductor film formed on the obverse surface of the silicon substrate is selectively etched, thus forming a gate electrode.
In other words, the polycrystal semiconductor film formed on the obverse surface of the silicon substrate is selectively etched to be formed into a gate electrode, and the polycrystal semiconductor film formed on the reverse surface of the silicon substrate is brought into direct contact with the silicon substrate, thereby exhibiting a gettering effect.
With use of the above-described method, the exclusive step of gettering becomes unnecessary if only a step of removing the insulation film on the rear film of the silicon substrate in the stage of forming the gate electrode on the silicon substrate, is added.
However, in the conventional methods, it is required to carry out an impurity diffusion with respect to a polycrystal semiconductor film at a high temperature, and therefore these methods still cannot meet the trend of the downsizing of semiconductor devices.
Further, in order to suppress the short channel effect of the MOSFET, which occurs along with the downsizing of semiconductor devices, it is effective to use an N-type gate electrode in an N-channel MOS and a P-type gate electrode in a P-channel MOS. However, in the conventional method, the type of the gate electrode is limited to one due to the impurity diffusion step. Therefore, it has been pointed out that in order to form two types of gate electrodes, namely, N- and P-types, a separate step must be provided, which increases the number of steps.